Journal of Soft Computing and Information Technology

Journal of Soft Computing and Information Technology

An Enhanced Replacement Policy to Mitigate Coherence-Induced Bias Temperature Instability in Cache Memories

Document Type : Persian Original Article

Author
Department of Computer Engineering, Faculty of Engineering, Golestan University, Gorgan, Iran.
Abstract
This paper proposes an enhanced replacement policy to mitigate the coherence-induced vulnerability of cache memories by static noise margin degradation prevention. The enhancement is conducted based on the outcomes of a comprehensive study intended to investigate the causes of static noise margin degradation in the SRAM cells. The empirical analysis demonstrates that the unbalanced distribution of data blocks associated with different coherency states over lines of a cache set can also be interpreted as a cause of the static noise margin degradation. Based on the findings, an aging-aware cache replacement policy is presented to balance the distribution of dirty/clean data blocks over the cache lines. To this intent, the decision tree of the Pseudo-LRU is revisited concerning the coherency state of cache lines and the type of address conflict miss. Using the enhanced cache, the hold and read static noise margin degradation are improved by about 9.9% and 11.5%, with less than 1.0% reduction in the cache hit ratio and negligible area and energy overheads.
Keywords

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